impact on the world of technology.
As a Verification Application Engineer (AE) at Cadence you will be responsible
for leading customer engagement solving verification challenges with leading
edge technologies and methodologies.
You will be collaborating with key customers deploying advanced simulation
flows in both RTL and GLS.
This Role Has 2 Main Parts
Pre-sale – join various technical campaigns presenting Cadence products and
suggest appropriate solutions to customer requirements based upon these
products. Post-sale – provide technical support of Cadence Functional
Verification products
Both roles require verification expertise with verification simulation.
The AE will be expected to work independently and collaborate with other team
members to address customer issues, identifying new opportunities or risks
that are linked to those activities.
The AE will collaborate with R&D teams to influence the tools and methodology
road map based upon customer requirements.
At this position you will be able to improve your technical skills working
with the industry leading engineers over a wide range of topics while
interacting with the business world too.
This position requires a solid understanding of simulation-based verification
flows such as RTL and GLS as well strong proficiency in Verilog/System
Verilog/VHDL/Specman-e.
Requirements
* BSc in Electrical engineering / Software engineering.
* 5-15 years of hands-on experience with verification.
* Knowledge in one or more of the following Languages: System Verilog/UVM, ‘e’, Verilog, VHDL
* Experience and knowledge of protocols like Ethernet, USB, , PCIe – advantage.
* Soft skills (lots of customer interactions): communicative, likes working with people, service aware, presentation skills.
* Strong verbal and written communication skills in English.
We’re doing work that matters. Help us solve what others can’t.
