System Verification Engineer

We are looking for a brilliant System Verification Engineer that can quickly
join the most promising and exciting start-up company in Kiryat Gat at its
very early stages to take a part in and contribute to developing a complex and
challenging chip.

Requirements:

BSEE/MSEE/Computer Engineering

Above 5 years of chip design development and verification

Deep familiarity with verification and debug methodologies and tools

Knowledgeable in Specman or system Verilog languages

Vast knowledge of verification flow – (block level and full chip verification)

Familiarity with one or more of the following verification environments: VMM,
OVM, UVM

Familiarity with formal verification – Advantage.

Strong technical skills

Quick learner

Independent

Good communications skills

Team players, extent human relations

מספר משרה: 8813

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